EM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 1MEM_A13 SRN47J-7-GP Local Frame Buffer Strapping List Copy from Becks. LFB_ID2 LFB_ID1 LFB_ID0 Hynix Main Source Qimonda 2nd Source Samsung 0 0 0 0 0 1 0 1 0 Vendor Part Number Wistron Part Number HY5PS121621CFP-25 72.51216.F0U HYB18T512161B2F-25 72.18512.M0U K4N51163QE-ZC25 72.45116.A0U A Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. HY5PS121621CFP-25-GP Title 14_ATi-RS780M_SidePort_(3/4) Size A3 Document Number 5 4 3 2 Rev FOOSE-AMD 15.4" Date: Friday, January 04, 2008 Sheet 1 SB 15 of 53 5 4 3 2 1 SSID = N.B D D U72F 0.6A per ANT Rev1.1, Page3 L15 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 1 2 BLM21PG221SN-1GP C376 2 1 C313 2 1 2 1 2 1 2 C321 +1.8V_RUN L25 X01 AMD schematic review 11/19. C247 1 +3.3V_RUN_VDD33 A25 D23 E22 G22 G24 G25 H19 J22 L17 L22 L24 L25 M20 N22 P20 R19 R22 R24 R25 H20 U22 V19 W22 W24 W25 Y21 AD25 VSSAHT1 VSSAHT2 VSSAHT3 VSSA

A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 1MEM_A13 Local Frame Buffer Strapping List Copy from Becks. LFB_ID2 LFB_ID1 LFB_ID0 Hynix Main Source Qimonda 2nd Source Samsung 0 0 0 0 0 1 Vendor Part Number Wistron Part Number HY5PS121621CFP-25 72.51216.F0U HYB18T512161B2F-25 72.18512.M0U K4N51163QE-ZC25 72.45116.A0U 0 1 0 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. HYB18T512161B2F-25-GP Title ATi-RS780M_SidePort_(4/5) Size A3 Document Number 5 4 3 2 Rev FOOSE-14"AMD-SB Date: Saturday, January 05, 2008 Sheet 1 SB 15 of 53 5 4 3 2 1 SSID = N.B +1.35V_RUN_LDO +1.2V_RUN_VDDHTTX L58 DY 1 2 BLM21PG221SN-1GP D L11,L17,L21,L25,L26,L27,L28,L58,L60,L62,L63,L64,L67,L69 1'nd 68.00084.821(Murata) 2'nd 68.00224.031(TDK) 220 ohm @ 100MHz,2A X01.(01/04 add) 120 mils +3.3V_RUN L25 1 2 +1.8V_RUN 1 2 BLM21PG221SN-1GP C315 1 C275 1 +1.8V_RUN_MEM C859 220 ohm @ 100MHz, 2A 2 1 C312 2 1 1 2 C287 2 1 2 1 2 1 2 1 2 1 2 1 2 1

MODE[0] SLOT_CLK_CFG USER[1] 3GIO_PADCFG[0] USER[0] RAM_CFG[3:0] 0111 0110 0101 other DESCRIPTION DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB Reserved NB9M-GE NB9M-GS NB9P-GE2 NB9P-GS Vendor Hynix Qimonda Samsung HY5PS121621CFP-25 HYB18T512161B2F-25 K4N51163QE-ZC25 0x06E 8 0x06E 9 0x064 8 0x064 9 1000 1001 1000 1001 PU PU PU PU B 5K 10K 5K 10K CS33572FB13 RES CHIP 35.7K 1/16W +-1%(0402) CS34532FB18 RES CHIP 45.3K 1/16W +-1% (0402) ROM_SI SAM 0101 PD 30.1K R137 10K/F_4 QIM 0110 PD 35.7K DHCP ROM HDCP_SCL HDCP_SCL HYN 0111 PD 45.3K R585 A Low: Crypto ROM Hi: I2C ROM PROJECT : QT6 Quanta Computer Inc. R561 *10K/F_4 Waiting Confirm from Nvidia NB5 5 PU-VDD PCI_DEVID: STRAP2 R554 Use 10MIL Guard(GND) Trace around THERMDC and THERMDA SI Build HDCP_SDA AT24C16B R555 *2K/F_4 +3V R562 10K/F_4 3 GND Logical TVMODE2] SUB_VENDOR 8 2 4 Logical Strapping Bit2 RAM ID: +3V Change P/N U36 1 SI Build PCI_DEVIDE[4] +3V SI Build R554 10K/F_4 ROM_SI ROM_SO ROM_SCLK HDCP ROM

EN_TERM100 RAMCFG[0] PCI_DEVID[1] PCI_DEVID[0] 3GIO_PADCFG[1] 3GIO_PADCFG[0] USER[1] USER[0] B DESCRIPTION Vendor 0111 0110 0101 0100 DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB Hynix HY5PS121621CFP-25 Qimonda HYB18T512161B2F-25 Samsung K4N51163QE-ZC25 Nanya/Elpida 0000 0001 0010 DDR2 64Mx16x8, 128bit, 1GB DDR2 64Mx16x8, 128bit, 1GB DDR2 64Mx16x8, 128bit, 1GB Hynix Samsung Qimonda NB9M-GE NB9M-GS NB9P-GE2 NB9P-GS CS33572FB13 0x06E 8 0x06E 9 0x064 8 0x064 9 1000 default 1001 1000 1001 default RES CHIP 35.7K 1/16W +-1%(0402) Hi: I2C ROM +3V Change P/N U8 VCC R516 *2K/F_4 PCI_DEVID: STRAP2 RAM_CFG[3:0] A0 R518 10K/F_4 Logical Strap Bit Mapping +3V NB9X VRAM Configuration Table 1 R565 15K/F_4 C Delete VGA thermal circuit A D 10K/F_4 STRAP0 +3V R566 *2K/F_4 PRIMARY DVI HOTPLUG SECONDARY DVI HOTPLUG R546 R562 PANEL BACKLIGHT PWM 45.3K/F_4 *4.99K/F_4 PANEL POWER ENABLE PANEL BACKLIGHT ENABLE NVVDD VID0 NVVDD VID1 +3V SEE Datasheet f

EN_TERM100 RAMCFG[0] PCI_DEVID[1] PCI_DEVID[0] 3GIO_PADCFG[1] 3GIO_PADCFG[0] USER[1] USER[0] B DESCRIPTION Vendor 0111 0110 0101 0100 DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB Hynix HY5PS121621CFP-25 Qimonda HYB18T512161B2F-25 Samsung K4N51163QE-ZC25 Nanya/Elpida 0000 0001 0010 DDR2 64Mx16x8, 128bit, 1GB DDR2 64Mx16x8, 128bit, 1GB DDR2 64Mx16x8, 128bit, 1GB Hynix Samsung Qimonda NB9M-GE NB9M-GS NB9P-GE2 NB9P-GS CS33572FB13 0x06E 8 0x06E 9 0x064 8 0x064 9 1000 default 1001 1000 1001 default RES CHIP 35.7K 1/16W +-1%(0402) Hi: I2C ROM +3V Change P/N U8 VCC R516 *2K/F_4 PCI_DEVID: STRAP2 RAM_CFG[3:0] A0 R518 10K/F_4 Logical Strap Bit Mapping +3V NB9X VRAM Configuration Table 1 R565 15K/F_4 C Delete VGA thermal circuit A D 10K/F_4 STRAP0 +3V R566 *2K/F_4 PRIMARY DVI HOTPLUG SECONDARY DVI HOTPLUG R546 R562 PANEL BACKLIGHT PWM 45.3K/F_4 *4.99K/F_4 PANEL POWER ENABLE PANEL BACKLIGHT ENABLE NVVDD VID0 NVVDD VID1 +3V SEE Datasheet f

DID_DAT_VGA 76 EDID_CLK_VGA DDR2 16M*16-2.5 1.8V FBGA-84 X8 03G151236214 HYNIX/HY5PS561621AFP-25 MEM_ID[3:0] = [1000] 03G151236012 INFINEON/HYB18T256161BF-25 MEM_ID[3:0] = [1001] R7029 10KOhm A +TPVDD PART 2 OF 7 R7001 1 R7011 1 R7000 1 1.8V FBGA-84 HYNIX/HY5PS121621CFP-25 [0000] INFINEON/HYB18T512161BF-25 [0001] B U7001B +3VS_VGA R1.1 No3 R2.0, No1 1: Enable external BIOS ROM device primary memory aperture size. (GPIO_9_ROMSI = don't care). If GPIO_22 = 1, then Config[3:0] defines the ROM type. E GPIO_4 0: For M76M * 1: For M64M/M66M * 0: Debug-Access Disable 1: Debug-Access Enable R7007 4.7KOhm /X D 1 U7000 VGA_THERM_CLK VGA_THERM_DATA 30 VGA_ALARM# {GPIO_28_TDO, GPIO_21_BB_EN, GENERICC, V2SYNC, H2SYNC} MUST keep Low during Reset & can NOT reserve Pull-Up +3VS_VGATHEM R7004 4.7KOhm /X R7066 200Ohm 1% R7068 1 R7067 1 VGA_ALARM# +3VS /X /X 2 0Ohm VGA_SCL_R 2 0Ohm VGA_SDA_R 2 R7023 1 4.7KOhm SMBCLK VCC SMBDATA DXP ALERT# DXN GND THERM# C7030 0.1UF/10V 2 GND VGA_D+ 1 2 3 4 C7031 1000PF/50V Title :A

DEVIDE[4] SUB_VENDOR RAMCFG[3] RAMCFG[2] PCI_DEVID[1] 3GIO_PADCFG[1] Hynix Samsung HY5PS1G1631CFR-25 K4N1G164QQ-HC25 0111 0110 0101 other DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB DDR2 32Mx16x8, 128bit, 512MB Reserved Hynix Qimonda Samsung HY5PS121621CFP-25 HYB18T512161B2F-25 K4N51163QE-ZC25 Delete VGA thermal circuit 1 2 3 4 A0 VCC A1 WP A2 SCL GND SDA 3GIO_PADCFG[0] USER[0] 0x06E 0x06E 0x064 0x064 8 9 8 9 B R554 1000 1001 1000 1001 RES CHIP 35.7K 1/16W +-1%(0402) Low: Crypto ROM Hi: I2C ROM +3V Change P/N U8 A NB9M-GE NB9M-GS NB9P-GE2 NB9P-GS CS33572FB13 DHCP ROM HDCP_SCL USER[1] PCI_DEVID: STRAP2 Vendor 1000 0010 XXXX XXXX 0001 1111 PEX_PLL_EN_TERM100 PCI_DEVID[0] PCI_DEVID[2] HDCP ROM Strapping Bit0 RAMCFG[0] 3GIO_PADCFG[2] DESCRIPTION 0000 0001 0010 0011 0100 0101 0110 0111 RAMCFG[1] PCI_DEVID[3] USER[2] PD 1000 1001 1010 1011 1100 1101 1110 1111 TVMODE[0] 3GIO_PADCFG[3] DDR2 64Mx16x8, 128bit, 512MB DDR2 64Mx16x8, 128bit, 512MB +3V TVMODE[1] SLOT_CLK_CFG STRAP1 USER[3] PU-VDD

= INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE RSVD = ATI RESERVED (DO NOT INSTALL) VIP0 VIP2 VIP4 VIP6 VIP7 GPIO2 H2SYNC GPIO3 PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET HY5PS121621CFP-25 Hynix 72.51216.F0U HYB18T512161B2F-25 72.18512.M0U GPIO_28_TDO GENERICC GPIO21_BB_EN Qimonda 400MHz A K4N51163QE-ZC25 Samsung 72.45116.A0U DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23 0 1 1 0 HYB18T512161B2F-20 72.18512.N0U A Wistron Corporation Qimonda 500MHz 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title STRAPS Size A3 Document Number Date: Tuesday, March 11, 2008 5 4 3 2 Rev P1/P15 SA Sheet 1 54 of 56 5 1 SPR2 SPRING-14 1 SPR1 SPRING-14 DY DY 2 1 SPR3 SPRING-7 1 H2 HOLE 3 1 H28 HOLE 1 H9 HOLE 1 1 H1 HOLE 4 D D H12 HOLE H10 HOLE H8 HOLE H14 HOLE H11 HOLE DY SPR6 SPR4 SPRING-62-GP H16 HOLE H17 HOLE 1 1 1 1 H13 HOLE SPR7DY H4 HOLE DY SPRING-58-GP 1 SC SC Keyboard EMI Caps H22 HOLE H18

ns) 600MHz (1.6ns) 500MHz (2.0ns) 500MHz (2.0ns) 450MHz (2.2ns) 400MHz (2.5ns) 350MHz (2.8ns) PART NUMBER H5PS1G63EFR-20L H5PS1G63EFR-25C HY5PS1G1631CFR-25C H5PS5162FFR-16C H5PS5162FFR-20C H5PS5162FFR-20L H5PS5162FFR-25C HY5PS121621CFP-2 HY5PS121621CFP-22 HY5PS121621CFP-25 HY5PS121621CFP-28 HY5PS121621CFP-33 HY5PS561621BFP-16 HY5PS561621BFP-2 HY5PS561621BFP-2L HY5PS561621BFP-22 HY5PS561621BFP-25 HY5PS561621BFP-28 PKG. FEATURE AVAIL. FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) FBGA (84ball) 8Bank, 1.8V / 1.8V 8Bank, 1.8V / 1.8V 8Bank, 1.8V / 1.8V 4Bank, 2.0V / 2.0V 4Bank, 2.0V / 2.0V 4Bank, 1.8V / 1.8V 4Bank, 1.8V / 1.8V 4Bank, 2.0V / 2.0V 4Bank, 2.0V / 2.0V 4Bank, 1.8V / 1.8V 4Bank, 1.8V / 1.8V 4Bank, 1.8V / 1.8V 4Bank, 2.0V / 2.0V 4Bank, 2.0V / 2.0V 4Bank, 1.8V / 1.8V 4Bank, 1.8V / 1.8V 4Bank, 1.8V / 1.8V

03_5% 1 1 C182 0.1U_0402_16V4Z 2 SIDE@ 2 C183 2.2U_0603_6.3V4Z 2 SIDE@ 02/15 Change L12 and L13 from bead to 0 ohm resistor. 02/15 Remove L96. 2 SIDE@1U_0603_10V6K Layout Note: 50 mil for VSSDL HY5PS561621AFP-25_FBGA84 SIDE@ 9/20 SA000012G20 S IC D2 32M16 HY5PS121621CFP-25 FBGA 84P 3 3 Side Port disable,VREF need connect to +1.8VS for DDR2 2 1 C203 SIDE@ 2 22U_0805_6.3V6M 2 1 C202 SIDE@ 0.1U_0402_16V4Z 1 1 0.1U_0402_16V4Z SIDE@ C201 1 1U_0402_6.3V4Z 2 SIDE@ C607 C608 2 1 1K_0402_1% 2 0.1U_0402_16V4Z SIDE@ 2 SIDE@ R99 1 SIDE@ +1.8VS L15 +MEM_VREF1 C200 2 1K_0402_1% SIDE@ C199 1 0.1U_0402_16V4Z R98 1 2 +MEM_VREF +1.8V_MEM_VDDQ SIDE@ 1U_0402_6.3V4Z 2 R97 1 2 1K_0402_1% SIDE@ 0.1U_0402_16V4Z 1 SIDE@ C196 2 +1.8V_MEM_VDDQ 1K_0402_1% C195 1 SIDE@ 0.1U_0402_16V4Z R96 1 2 +1.8V_MEM_VDDQ 1 SIDE@ 2 0_0805_5% 220 ohm @ 100MHz,2A SIDE@ 4 4 Compal Secret Data Security Classification 2007/08/02 Issued Date 2008/08/02 Deciphered Date Title Compal Electronics, Inc. RS780 Side-Port DDR2 SDRAM THIS SHEET OF ENGINE

RE USED, THEY MUST NOT CONFLICT DURING RESET VHAD0 B VIP0 VIP2 VIP4 VIP6 VIP7 GPIO2 GPIO3 H2SYNC PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23 1 1 1 1 HY5PS121621CFP-25 Hynix 72.51216.F0U GPIO_28_TDO GENERICC U57 71.ICH9M.E0U 1 1 1 0 HYB18T512161B2F-25 72.18512.M0U DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23 1 1 0 1 K4N51163QE-ZC25 SamSung 72.45116.A0U Delete R433,R627,R649,R653 R186,187,188,198,201,202-> 63.R0034.1DL Qimonda D45 VRAM SELECT B For Samsung R431,R430,R627,R433 (63.10334.1DL) GPIO21_BB_EN D45 BOM U43 71.CNTIG.H0U DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23 For Qimonda R431,R430,R432,R587 (63.10334.1DL) Delete R587,R432,R649,R653 BOM DM2 62.10017.G31 U49 84.04634.037 U15 84.08896.037 H29 34.4B417.001 H30 34.4B417.001 H27 34.4F403.001 H31 34.4F403.001 H7 34.4F403.001 H9 34.4F403.001 H10 34.4G501.001 NET DM2 62.10017.G31 U35 62.10053.401 U11 71.00773.00G U64 71.00380.003 D46 BOM U43 71.CNTI

, February 13, 2009 Sheet 25 A of 91 A 5 4 3 2 1 5 4 3 2 1 D D [6,8,23,53] SCL_3A SMB_CLK_S [6,8,23,53] [6,8,23,53] SDA_3A SMB_DAT_S [6,8,23,53] C C Onboard DRAM ID GPIO_6 GPIO_11 Vendor 0 0 Qimonda HYB18T512161B2F-25 0 1 Samsung K4N51163QZ-HC25 1 0 Hynix HY5PS121621CFP-25 HDA_SYNC STRAP (BUF_SIO_CLK) 0 14.318MHz (default) 1 0 MII 1 RGMII SPKR B Base on EC FUNCTION SPI_CLK 31MHz 0 1 42MHz 1 0 25MHz 1 1 1MHz 2 0 1 0 R2510 1% 1KOhm 1 A R2509 10KOhm 1% 1 R2508 10KOhm 1% SPI_DO 1 2 1 1 2 R2507 10KOhm @ GND GND GND GND R2511 10KOhm @ R2512 10KOhm 1% 2 SPI_CLK SPI_DO [23] R2513 10KOhm 1% R2514 10KOhm 1% 1 SPI BIOS SB_SPKR [23] 1 0 MII_TXD0 [23,36] 2 1 PCI BIOS R2506 10KOhm @ LPC_FRAME# [21] 2 1 R2505 10KOhm @ PR 0508-07 nVIDIA ACZ_SYNC_AUD ACZ_SDOUT_AUD [21,30,44] +3VSUS 1 0 LPC BIOS R2504 10KOhm 1% 1 0 [23,36] 2 0 FUNCTION 2 LPC_FRAME @ R2503 8.2KOhm @ +3VSUS 2 [23,36] HDA_SDOUT R2502 8.2KOhm +3VS 2 @ 2 2 R2501 10KOhm +3VSUS 2 Safe mode boot Init table +3VS 1 1 +3VS 1 +3VS 2 User mode boot Init table

62FFR-20L FBGA(84ball) 4Bank, 1.8V/1.8V Now 400MHz (2.5ns) H5PS5162FFR-25C FBGA(84ball) 4Bank, 1.8V/1.8V Now 500MHz (2.0ns) HY5PS121621CFP-2 FBGA(84ball) 4Bank, 2.0V/2.0V Now 450MHz(2.2ns) HY5PS121621CFP-22 FBGA(84ball) 4Bank, 2.0V/2.0V Now 400MHz (2.5ns) HY5PS121621CFP-25 FBGA(84ball) 4Bank, 1.8V/1.8V Now 350MHz (2.8ns) HY5PS121621CFP-28 FBGA(84ball) 4Bank, 1.8V/1.8V Now 300MHz (3.3ns) HY5PS121621CFP-33 FBGA(84ball) 4Bank, 1.8V/1.8V Now HY5PS561621BFP-16 FBGA(84ball) 4Bank, 2.0V/2.0V Now 500MHz (2.0ns) HY5PS561621BFP-2 FBGA(84ball) 4Bank, 2.0V/2.0V Now 500MHz (2.0ns) HY5PS561621BFP-2L FBGA(84ball) 4Bank, 1.8V/1.8V Now 450MHz(2.2ns) HY5PS561621BFP-22 FBGA(84ball) 4Bank, 1.8V/1.8V Now 400MHz (2.5ns) HY5PS561621BFP-25 FBGA(84ball) 4Bank, 1.8V/1.8V Now 350MHz (2.8ns) HY5PS561621BFP-28 FBGA(84ball) 4Bank, 1.8V/1.8V Now 600Mhz (1.6ns) Graphics Memory - GDDR3 SDRAM DENSITY 1Gb 512Mb ORG. 64Mx16 32Mx16 16Mx32 256Mb 8Mx32 SPEED PART NUMBER PKG. FEATURE AVAIL. 600MHz (1.6ns) H5TQ1G63AFR-16C FBGA(96ball) 8

FB_CMD1 FB_CMD3 FB_CMD13 FB_CMD4 FB_CMD5 FB_CMD6 FB_CMD21 FB_CMD23 FB_CMD19 FB_CMD20 FB_CMD17 FB_CMD16 FB_CMD14 J1 F7 E8 1 VREF1 *VRAM 0101 RAM_CFG[3:0] R457,R462,R468,R471 CLK CLK# C701 *0.1U/10V_4 LDQS LDQS# 2 0111 RAM_CFG[3:0] R117 *1K FBDQS2 FBDQS#2 1 HY5PS121621CFP-25 R460,R462,R469,R470 (32M*16) SAM: AKD59G-T502 J8 K8 B7 A8 2 (32M*16) HYU: AKD5FG-TW31 FB_CLK0 FB_CLK0# UDQS UDQS# +1.8V 1 0011 RAM_CFG[3:0] VSSQ_0 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 RAS CAS WE CS CKE ODT 1 R460,R462,R468,R470 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 K7 L7 K3 L8 K2 K9 D 2 0011 RAM_CFG[3:0] UDM LDM FB_CMD15 FB_RAS* FB_CMD25 FB_CAS* FB_CMD9 FB_WE* FB_CMD8 FB_CS0* FB_CMD11 FB_CKE FB_CMD12_R 2 HY5PS561621AFP-25 VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 J2 D3A R118 *1.5K 40% BA0 BA1 B3 F3 FB_BA1 1 R460,R462,R468,R470 (16M*16) HYU AKD5JG-TW12 A3 E3 J3 N1 P9 VREF FBDQS0 FBDQS#0 L2 L3 FBDQM2 FBDQM3 FBD24 FBD26 FBD25 FBD30 FBD28 FBD27 FBD29 FBD31 FBD19 FBD20 FBD16 FBD18 FBD23 FBD17 FBD22 FBD21 2 0010 RAM_CFG[3:0] VS

C4 NC5 NC6 A2 E2 L1 R3 R7 R8 VSS1 VSS2 VSS3 VSS4 VSS5 A3 E3 J3 N1 P9 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 VSSDL J7 VMREFA1 15mil +1.8V +1.8V +1.8V B +1.8V FBA_CMD27 14 512Mb(32Mx16) : AKD5FG-TW31/Hynix(HY5PS121621CFP-25) AKD5FG-T^04/Qimonda(HYB18T512161B2F-20) 14 VMA_DQ[63..0] 14 VMA_DM[7..0] 14 VMA_WDQS[7..0] 14 VMA_RDQS[7..0] 14,15,33,37,40 +1.8V A PROJECT : LE8 Quanta Computer Inc. HY5PS561621BFP-25@EV Size Document Number Custom Rev 1A NV9X VRAM-1(GDDR2 BGA84) Date: 5 4 3 2 Tuesday, November 20, 2007 Sheet 1 18 of 44 5 4 3 2 1 24,27,31,33,34,36,37,38,42 3VPCU 22,36 +3VRTC +3VRTC 3,5,7,10,11,12,13,15,16,20,21,22,23,24,25,26,27,28,30,31,33,34,35,36,37,38,40,41,42,43,44 5,10,20,22,33,35,37,41 3,4,5,6,7,9,10,22,33,37,41,43 RB500V-40 D6 1U/6.3V_4 G1 *SHORT_ PAD1 U27A RTC_RST# SRTC_RST SM_INTRUDER# 1M/F_4 1 2 TP53 TP65 TP64 TP68 TP66 RTC_BAT_V 5VPCU 20MIL 1.2K TP69 TP71 TP67 20MIL VCCRTC_1 R354 1K VCCRTC_3 Q18 3 TP70 1 R255 +1.5V MMBT3904 24.9/F